June 29, 2007

AMD to Ship Quad-Core ‘Barcelona’ Chips in August

Computer processor manufacturer AMD will begin shipping its new quad-core Opteron processor, codenamed “Barcelona,” in August, and the company anticipates systems from AMD platform partners will begin to ship in September.

According to AMD, the Barcelona is the “world’s first x86 CPU to integrate four processing cores on a single die of silicon,” a fact than enabled the processor to deliver significantly higher performance-per-watt over existing chip architectures, and still be backwards-compatible with existing AMD Opteron platforms.

“More than ever before, customers are expecting energy efficiency and performance-per-watt leadership as much as absolute performance,” said Randy Allen, corporate vice president of the server and workstation division of AMD.

“AMD has prioritized production of our low power and standard power products because our customers and ecosystem demand it, and we firmly believe that the introduction of our native quad-core AMD Opteron processor will deliver on the promise of the highest levels of performance-per-watt the industry has ever seen,” Allen said.

As of its launch, the Barcelona will range in frequencies of up to 2.0 Ghz; according to AMD, the company expects that the processing will be scaled to even higher frequencies by the end of this year.

According to industry analyst Brandon Shalton, the primary application of the new chips within the adult industry would likely be to enhance the performance of database servers.

“Quad processors are better suited for servers, and some more advanced rendering uses multiprocessors, so they would see the speed benefits,” Shalton told XBIZ. “An ISP would use them for mega webservers, and people like Pixar could use it for server-based rendering.”

AMD stated in a press release that the Barcelona can “provide a performance increase up to 70 percent on certain database applications and up to 40 percent on certain floating point applications, with subsequent higher frequency processors expected to significantly add to this performance advantage.”

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